Hardware optimized parity check gates for superconducting surface codes
Our central consideration, Hardware Optimized Parity (HOP) gates, achieves stabilizer-type measurements through simultaneous multi-qubit conditional phase accumulation. Despite the multi-body effects that underpin this approach, our estimates of logical faults suggest that this design can be at least as robust to realistic noise as conventional designs.
Entanglement perspective on the quantum approximate optimization algorithm
Here, we consider the QAOA algorithm for solving the paradigmatic Max-Cut problem on different types of graphs. We study the entanglement growth and spread resulting from randomized and optimized QAOA circuits and find that there is a volume-law entanglement barrier between the initial and final states.
Parametric-resonance entangling gates with a tunable coupler
We realize a parametric-resonance gate, which is activated by bringing the average frequency of the modulated qubit in resonance with a static-frequency qubit while approximately retaining the bare qubit-qubit coupling.