Building quantum computers combines advances in engineering, physics, computer science, and manufacturing. Integrating all these specialties under one roof and in one technology stack allows us to move further, faster.
Quantum processor chips are the foundation of our technology stack. Manufacturing these chips begins with the ability to design high quality quantum-coherent superconducting microwave devices. We leverage advanced modeling and simulation tools to design linear and nonlinear chip components, accurately predict performance behavior of large scale integrated quantum circuits (QuICs), and produce masksets to be fabbed in our manufacturing facility, Fab-1.
Fab-1 is a captive quantum integrated circuit foundry. We combine modern silicon semiconductor and MEMS processing technologies with novel manufacturing methods to produce state-of-the-art superconducting qubits and device layers for microwave circuitry. Our process flows leverage superconducting materials such as aluminum, indium, and niobium in a series of subtractive patterning, etching, lithography, and deposition processes that result in ultra-low-loss superconducting devices. We incorporate best practices from industrial and research fabs to maintain a stable process of record while also running continuous shortloop development tests to optimize for fast learning cycles.
Scalable performance in a quantum integrated circuit architecture requires both 3D integration to support I/O requirements and careful engineering of the electromagnetic environment in which the qubits operate. Rigetti processors employ through-silicon vias and a bonded superconducting cap to isolate the components on our chips, maximize coherence, minimize crosstalk, and enable advanced packaging. Our packaging capabilities allow for scalable processor architectures that reliably interface to dense signal delivery wiring without tradeoffs in quantum performance.
Continuous improvement in processor performance requires high throughput test capabilities to gather statistically significant data for each design iteration or fab process change. Rigetti Fab-1 engineers use dedicated cryogenic systems with custom measurement automation software to efficiently characterize dozens of qubits simultaneously. This reduces learning time and widens the range of tests engineers can run.
Superconducting Qubits
Rigetti systems are powered by superconducting qubit-based quantum processors. As a lithographically defined chip-based technology, superconducting qubits are intrinsically highly scalable. They also offer fast gate times, low-latency conditional logic, and fast program execution times, making them ideally suited to NISQ era applications and the requirements for quantum error correction and fault-tolerant quantum computing.
At the chip level, each superconducting qubit consists of a non-linear Josephson inductance in parallel with an ultra-low-loss capacitor to create a resonant structure in the 3-6GHz range. Qubits are coupled to a linear superconducting resonator for readout. The combination of the qubit, the linear readout resonator, and the associated wiring provides a general purpose quantum circuit element capable of reliably encoding, manipulating, and reading out quantum information. Rigetti processors use arrays of qubits coupled to one another with on-chip capacitances. Single and multi-qubit logic operations are implemented through the application of microwave or DC pulses.
Scalable Quantum Processors
Reliably building large planar arrays of qubits requires sustained innovation in design and manufacturing capabilities. Rigetti processors leverage our distinctive Fab-1 capabilities to achieve both performance and scalability, including superconducting through-silicon vias and superconducting flip-chip cap bonding. Each of these plays a dual role in the qubit and processor design, providing an electromagnetic housing for each qubit while also enabling targeted connections to other qubits and to signal delivery wiring. Further scalability enhancements, such as multiplexed readout, are created through on-chip design features that allow single input/output lines to address a plurality of qubits.
Turning a quantum processor into a fully functional computer requires the ability to control the qubits in a reliable and programmable way. In a superconducting quantum computer, QuICs are packaged and housed in cryogenic dilution refrigerators. Room temperature microwave control electronics generate qubit control and readout signals that are then delivered to and received from the quantum processor through a cryogenically compatible interconnect system.
Our custom FPGA-based control hardware includes a powerful classical CPU and memory system. This integrated system is designed and built for the low-latency architecture necessary for hybrid quantum-classical computing and implementation of high-throughput quantum programs. These instruments drive the quantum processors, calibrate and operate single and multi-qubit gates, and read out qubit states at the end of a computation. The system is designed to maintain phase coherence, control signal stability, and ease of calibration to ensure consistent QPU performance.
Traditional interconnect systems use coaxial cables to carry signals to and from the QPU. With multiple transmission lines associated with each qubit, this design does not scale well for larger quantum processors. We’ve developed and integrated high-density flexible circuits, each of which replace as many as 10 coax lines for higher signal density. These highly compact assemblies have low loss and low thermal heat load. They incorporate passive components like attenuators, RF filters, bias Ts, and amplifiers that optimize signal processing and protect the qubits from noise.
From there, signals interface with the QuIC package where they are routed vertically to the chip. Compared with routing signals to the perimeter of the chip, this three-dimensional signaling architecture allows reductions in the size of the QuICs and improves signal integrity to and from the quantum processor.
Together, these hardware technologies enable state-of-the-art qubit energy relaxation and dephasing times, as well as <0.1% amplitude crosstalk and high one- and two-qubit gate fidelities. The flex cables and integrated microwave assemblies are scalable to hundreds of qubits in a commercial dilution refrigerator, enabling larger QPUs that facilitate the evaluation of advanced quantum algorithms and pave the way toward quantum advantage.
Quantum computers operate as specialized co-processors in tandem with classical computing resources. These resources must be tightly coupled to enable the highest possible performance. Rigetti pioneered hybrid quantum-classical computation with its Quantum Cloud Services platform (QCS), which has evolved to support ultra-low latency connectivity—less than one millisecond—between a customer’s high-performance classical hardware and Rigetti QPUs.
Competitive approaches tend to connect QPUs to a user’s classical hardware over the internet and behind a shared queue, where the QPU behaves like a remote quantum circuit evaluator rather than a tightly coupled co-processor. These circuit evaluators can introduce latency between the associated classical resources on the order of seconds to hours.
Quantum Operating System & APIs
Rigetti supports integration with a wide variety of classical resources through network APIs. The APIs provide access to core quantum operating system functions such as User Authentication, System Service Authorization, Circuit Submission, Circuit Scheduling, Memory Management, and Concurrency.
The APIs are supported by Rigetti SDKs, with API endpoints designed to enable developers to construct their own software. For those partners who require end-user access to Rigetti QPUs, we provide a Jupyterlab-based IDE directly connected to classical hardware hosted by Rigetti and integrated with our QPUs.
QUIL
The Rigetti-developed quantum instruction language Quil provides a quantum programming abstraction for QPUs. Quil, which most closely resembles an assembly language for quantum programming, combines gate-level and pulse-level descriptions of quantum circuits while integrating classical instructions and shared memory. All relevant API endpoints expect Quil as the description for a quantum program to be executed on a Rigetti QPU.
Quil-T
Quil-T is an extension to the Quil language with support for the control of continuous time dynamics of the microwave signals sent to the quantum integrated circuit. With Quil-T, gate definitions and pulse parameters are programmable. Because Quil-T provides access to the calibrations associated with the native gates implemented on the Rigetti QPU, pulses can be edited and pulse timing can be modified. Quil-T is integrated directly into the normal programming chain through pyQuil, the quilc compiler, and Rigetti APIs.
Rigetti offers a suite of open source tools through its Quil SDK, ranging from higher level language interfaces for Quil and device simulation, to circuit optimization and compilation software for efficiently designing experiments and performing algorithm research.
PyQuil
PyQuil is a Python library for writing and running quantum programs using Quil (see QCS Platform above). PyQuil allows developers to easily generate Quil programs from quantum gates and classical operations, compile and simulate those programs using the Quil compiler (quilc) and the Quantum Virtual Machine (QVM), Rigetti’s quantum simulator, or execute them on Rigetti QPUs.
Quilc
Quilc is an optimizing compiler for gate-based quantum programs. Quilc takes as input any arbitrary Quil code—derived from pyQuil, QISKit, or Cirq—and outputs native Quil optimized for Rigetti QPUs. Quilc can be configured with an instruction set architecture (ISA) to target an arbitrary set of native gates and QPU topologies. Using the ISA, Quilc can be configured to compile to arbitrary quantum processors, including non-Rigetti QPUs. Quilc also accepts QASM, a popular low-level quantum circuit description language, as its input.
As an optimizing quantum compiler, Quilc is capable of performing circuit transformations to produce optimal circuit implementations for a specific Rigetti processor, including taking the specific one- and two-qubit gate fidelities of a particular QPU into account. Such optimizations allow developers to write programs faster while preserving—or in many cases improving—their execution fidelity on a given hardware system. Optimizations may be turned off for those who want precise control over the executable circuit.
QVM
The Quantum Virtual Machine is Rigetti’s open source implementation of a quantum computation simulator. The QVM executes programs specified in Quil, emulating execution with and without noise. The QVM can be configured to support a particular QPU system, and comes ready to simulate production Rigetti QPUs. The QVM simulates the unitary evolution of a wavefunction with classical control. It features stochastic pure-state evolution, density matrix evolution, and Pauli noise channels, and provides shared memory access to the obtained quantum state. The QVM can be run in a fast just-in-time compilation mode for rapid simulation of large programs with many qubits.
Rigetti has operated quantum computers over the cloud continuously since 2017. Steady improvements in the number of qubits and fidelity of the operations with each new generation bring us closer to the inflection point at which quantum computers will begin to outperform classical ones.
| Rigetti Ankaa-9Q-3 | Median Time Duration (µs) |
|---|---|
| Qubits | 9 |
| T1 Lifetime | 21 |
| T2 Lifetime | 24 |
| Rigetti Ankaa-9Q-3 | Median Fidelity (per op.) |
|---|---|
| Single-qubit gates | 99.9% |
| Two-qubit gates (ISWAP) | 99.2% |
Ankaa-9Q-3 was deployed on June 27, 2024
Driving the leading edge in system design and performance.
Classical symmetric encryption algorithms use N bits of a shared secret key to transmit N bits of a message over a one-way channel in an information theoretically secure manner. This paper proposes a hybrid quantum-classical symmetric cryptosystem that uses a quantum computer to generate the secret key.
Learn MoreWe develop a hardware-efficient ansatz for variational optimization, derived from existing ansatze in the literature, that parametrizes subsets of all interactions in the Cost Hamiltonian in each layer. We treat gate orderings as a variational parameter and observe that doing so can provide significant performance boosts in experiments. We carried out experimental runs of a compilation-optimized implementation of fully-connected Sherrington-Kirkpatrick Hamiltonians on a 50-qubit linear-chain subsystem of Rigetti Aspen-M-3 transmon processor.
Learn MoreHere, we demonstrate low-latency feedback with a scalable FPGA decoder integrated into the control system of a superconducting quantum processor. We perform an 8-qubit stability experiment with up to 25 decoding rounds and a mean decoding time per round below 1 \unit\micro, showing that we avoid the backlog problem even on superconducting hardware with the strictest speed requirements.
Learn MoreQuantum approximate optimization is one of the promising candidates for useful quantum computation, particularly in the context of finding approximate solutions to Quadratic Unconstrained Binary Optimization (QUBO) problems. However, the existing QPUs are relatively small, and canonical mappings of QUBO via the Ising model require one qubit per variable, rendering direct large-scale optimization infeasible. In classical optimization, a general strategy for addressing many large-scale problems is via multilevel/multigrid methods, where the large target problem is iteratively coarsened, and the global solution is constructed from multiple small-scale optimization runs. In this work, we experimentally test how existing QPUs perform as a sub-solver within such a multilevel strategy.
Learn MoreRigetti delivers full stack quantum capabilities through its Quantum Cloud Services platform. QCS extends our QPUs, services, APIs, and tools to any public, private, or hybrid cloud. We provide the low-latency access required for high-performance hybrid quantum-classical computing, coupled with the security, scalability, and flexibility of classical resources that fit the computational needs of our customers’ workloads.
Rigetti Quantum Compute Center in Berkeley, CA.
Public cloud providers who redistribute on-demand computational resources to end users.
HPC and scientific computing organizations that offer shared resources to select user communities.
Private cloud operators and enterprises who want to capture the benefits of quantum computing without maintaining on-prem quantum hardware.
Professional services and application providers who leverage existing cloud infrastructure to power their solutions and services.
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